MI_TARGET_INAMP 505 dev/pci/azalia.h #define MI_TARGET_INAMP(x) (x)
MI_TARGET_INAMP 906 dev/pci/azalia_codec.c MI_TARGET_INAMP(target), &result);
MI_TARGET_INAMP 916 dev/pci/azalia_codec.c MI_TARGET_INAMP(target), &result);
MI_TARGET_INAMP 923 dev/pci/azalia_codec.c n = this->w[nid].connections[MI_TARGET_INAMP(target)];
MI_TARGET_INAMP 928 dev/pci/azalia_codec.c MI_TARGET_INAMP(target)));
MI_TARGET_INAMP 938 dev/pci/azalia_codec.c CORB_GAGM_RIGHT | MI_TARGET_INAMP(target),
MI_TARGET_INAMP 1047 dev/pci/azalia_codec.c MI_TARGET_INAMP(target), &result);
MI_TARGET_INAMP 1062 dev/pci/azalia_codec.c CORB_GAGM_RIGHT | MI_TARGET_INAMP(target),
MI_TARGET_INAMP 1087 dev/pci/azalia_codec.c MI_TARGET_INAMP(target), &result);
MI_TARGET_INAMP 1107 dev/pci/azalia_codec.c CORB_GAGM_RIGHT | MI_TARGET_INAMP(target),
MI_TARGET_INAMP 1462 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x08, MI_TARGET_INAMP(0)}, /* and 0x09, 0x0a(mono) */
MI_TARGET_INAMP 1464 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1466 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(65)}}, 0x07, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1468 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 1470 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(65)}}, 0x07, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 1472 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(2)},
MI_TARGET_INAMP 1474 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, 3}}, 0x07, MI_TARGET_INAMP(2)},
MI_TARGET_INAMP 1476 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(3)},
MI_TARGET_INAMP 1478 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(65)}}, 0x07, MI_TARGET_INAMP(3)},
MI_TARGET_INAMP 1480 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(4)},
MI_TARGET_INAMP 1482 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(65)}}, 0x07, MI_TARGET_INAMP(4)},
MI_TARGET_INAMP 1484 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(5)},
MI_TARGET_INAMP 1486 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(65)}}, 0x07, MI_TARGET_INAMP(5)},
MI_TARGET_INAMP 1493 dev/pci/azalia_codec.c ENUM_OFFON}, 0x04, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1495 dev/pci/azalia_codec.c .un.v={{""}, 2, MIXER_DELTA(35)}}, 0x04, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1501 dev/pci/azalia_codec.c ENUM_OFFON}, 0x05, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1503 dev/pci/azalia_codec.c .un.v={{""}, 2, MIXER_DELTA(35)}}, 0x05, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1528 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x08, MI_TARGET_INAMP(0)}, /* and 0x09, 0x0a(mono) */
MI_TARGET_INAMP 1530 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1532 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(65)}}, 0x07, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1534 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(4)},
MI_TARGET_INAMP 1536 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(65)}}, 0x07, MI_TARGET_INAMP(4)},
MI_TARGET_INAMP 1538 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(5)},
MI_TARGET_INAMP 1540 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(65)}}, 0x07, MI_TARGET_INAMP(5)},
MI_TARGET_INAMP 1545 dev/pci/azalia_codec.c ENUM_OFFON}, 0x04, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1547 dev/pci/azalia_codec.c .un.v={{""}, 2, MIXER_DELTA(35)}}, 0x04, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1552 dev/pci/azalia_codec.c ENUM_OFFON}, 0x05, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1554 dev/pci/azalia_codec.c .un.v={{""}, 2, MIXER_DELTA(35)}}, 0x05, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1599 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x08, MI_TARGET_INAMP(0), &mc);
MI_TARGET_INAMP 1600 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x08, MI_TARGET_INAMP(1), &mc);
MI_TARGET_INAMP 1601 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x09, MI_TARGET_INAMP(0), &mc);
MI_TARGET_INAMP 1602 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x09, MI_TARGET_INAMP(1), &mc);
MI_TARGET_INAMP 1603 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x0a, MI_TARGET_INAMP(0), &mc);
MI_TARGET_INAMP 1604 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x0a, MI_TARGET_INAMP(1), &mc);
MI_TARGET_INAMP 1658 dev/pci/azalia_codec.c } else if (m->nid == 0x08 && m->target == MI_TARGET_INAMP(0)) {
MI_TARGET_INAMP 1712 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1714 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1716 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 1718 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 1720 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(2)},
MI_TARGET_INAMP 1722 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(2)},
MI_TARGET_INAMP 1724 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(4)},
MI_TARGET_INAMP 1726 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(4)},
MI_TARGET_INAMP 1728 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(5)},
MI_TARGET_INAMP 1730 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 1, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(5)},
MI_TARGET_INAMP 1743 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0c, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1745 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0c, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 1754 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0d, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1756 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0d, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 1765 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0e, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1767 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0e, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 1776 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0f, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1778 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0f, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 1789 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x07, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1791 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x07, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1798 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x08, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1800 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x08, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1807 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x09, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1809 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x09, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1865 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x24, MI_TARGET_INAMP(0), &mc);
MI_TARGET_INAMP 1866 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x23, MI_TARGET_INAMP(1), &mc);
MI_TARGET_INAMP 1867 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x22, MI_TARGET_INAMP(2), &mc);
MI_TARGET_INAMP 1921 dev/pci/azalia_codec.c MI_TARGET_INAMP(i), &mc2);
MI_TARGET_INAMP 1995 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1997 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 1999 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 2001 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 2003 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(2)},
MI_TARGET_INAMP 2005 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(2)},
MI_TARGET_INAMP 2007 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(4)},
MI_TARGET_INAMP 2009 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(4)},
MI_TARGET_INAMP 2011 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0b, MI_TARGET_INAMP(5)},
MI_TARGET_INAMP 2013 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 1, MIXER_DELTA(31)}}, 0x0b, MI_TARGET_INAMP(5)},
MI_TARGET_INAMP 2026 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0c, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2028 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0c, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 2036 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0d, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2038 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0d, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 2047 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0e, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2049 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0e, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 2058 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0f, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2060 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x0f, MI_TARGET_INAMP(1)},
MI_TARGET_INAMP 2063 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x08, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2065 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x08, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2073 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x09, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2075 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(31)}}, 0x09, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2131 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x23, MI_TARGET_INAMP(1), &mc);
MI_TARGET_INAMP 2132 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x22, MI_TARGET_INAMP(2), &mc);
MI_TARGET_INAMP 2220 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x08, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2222 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(30)}}, 0x08, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2228 dev/pci/azalia_codec.c 0, 0, ENUM_OFFON}, 0x09, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2230 dev/pci/azalia_codec.c 0, 0, .un.v={{""}, 2, MIXER_DELTA(30)}}, 0x09, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2597 dev/pci/azalia_codec.c ENUM_OFFON}, 0x09, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2599 dev/pci/azalia_codec.c .un.v={{""}, 2, MIXER_DELTA(15)}}, 0x09, MI_TARGET_INAMP(0)},
MI_TARGET_INAMP 2642 dev/pci/azalia_codec.c azalia_generic_mixer_set(this, 0x09, MI_TARGET_INAMP(0), &mc); /* mute input */