dmacsr           1680 dev/pci/hifn7751.c 	u_int32_t dmacsr, restart;
dmacsr           1683 dev/pci/hifn7751.c 	dmacsr = READ_REG_1(sc, HIFN_1_DMA_CSR);
dmacsr           1688 dev/pci/hifn7751.c 	    dmacsr, READ_REG_1(sc, HIFN_1_DMA_IER),
dmacsr           1693 dev/pci/hifn7751.c 	if ((dmacsr & sc->sc_dmaier) == 0)
dmacsr           1696 dev/pci/hifn7751.c 	WRITE_REG_1(sc, HIFN_1_DMA_CSR, dmacsr & sc->sc_dmaier);
dmacsr           1698 dev/pci/hifn7751.c 	if (dmacsr & HIFN_DMACSR_ENGINE)
dmacsr           1702 dev/pci/hifn7751.c 	    (dmacsr & HIFN_DMACSR_PUBDONE))
dmacsr           1706 dev/pci/hifn7751.c 	restart = dmacsr & (HIFN_DMACSR_R_OVER | HIFN_DMACSR_D_OVER);
dmacsr           1708 dev/pci/hifn7751.c 		printf("%s: overrun %x\n", sc->sc_dv.dv_xname, dmacsr);
dmacsr           1711 dev/pci/hifn7751.c 		if (dmacsr & HIFN_DMACSR_ILLR)
dmacsr           1713 dev/pci/hifn7751.c 		if (dmacsr & HIFN_DMACSR_ILLW)
dmacsr           1717 dev/pci/hifn7751.c 	restart = dmacsr & (HIFN_DMACSR_C_ABORT | HIFN_DMACSR_S_ABORT |
dmacsr           1726 dev/pci/hifn7751.c 	if ((dmacsr & HIFN_DMACSR_C_WAIT) && (dma->resu == 0)) {