dc_sc             131 dev/mii/dcphy.c 	struct dc_softc *dc_sc;
dc_sc             143 dev/mii/dcphy.c 	dc_sc = mii->mii_ifp->if_softc;
dc_sc             144 dev/mii/dcphy.c 	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
dc_sc             145 dev/mii/dcphy.c 	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
dc_sc             149 dev/mii/dcphy.c 	switch(dc_sc->dc_csid) {
dc_sc             155 dev/mii/dcphy.c 		if (dc_sc->dc_pmode == DC_PMODE_SIA) {
dc_sc             169 dev/mii/dcphy.c 	if (dc_sc->dc_type == DC_TYPE_21145)
dc_sc             181 dev/mii/dcphy.c 	struct dc_softc *dc_sc;
dc_sc             189 dev/mii/dcphy.c 	dc_sc = mii->mii_ifp->if_softc;
dc_sc             216 dev/mii/dcphy.c 		mode = CSR_READ_4(dc_sc, DC_NETCFG);
dc_sc             228 dev/mii/dcphy.c 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
dc_sc             235 dev/mii/dcphy.c 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
dc_sc             238 dev/mii/dcphy.c 			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
dc_sc             239 dev/mii/dcphy.c 			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
dc_sc             241 dev/mii/dcphy.c 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
dc_sc             243 dev/mii/dcphy.c 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
dc_sc             244 dev/mii/dcphy.c 			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
dc_sc             245 dev/mii/dcphy.c 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
dc_sc             252 dev/mii/dcphy.c 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
dc_sc             278 dev/mii/dcphy.c 		reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
dc_sc             315 dev/mii/dcphy.c 	struct dc_softc *dc_sc;
dc_sc             317 dev/mii/dcphy.c 	dc_sc = mii->mii_ifp->if_softc;
dc_sc             322 dev/mii/dcphy.c 	reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
dc_sc             326 dev/mii/dcphy.c 	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
dc_sc             328 dev/mii/dcphy.c 		tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
dc_sc             330 dev/mii/dcphy.c 			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
dc_sc             354 dev/mii/dcphy.c 			if (DC_IS_INTEL(dc_sc))
dc_sc             355 dev/mii/dcphy.c 				DC_CLRBIT(dc_sc, DC_10BTCTRL,
dc_sc             374 dev/mii/dcphy.c 		if (DC_IS_INTEL(dc_sc))
dc_sc             375 dev/mii/dcphy.c 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
dc_sc             380 dev/mii/dcphy.c 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
dc_sc             385 dev/mii/dcphy.c 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)