cmdq 226 dev/pci/if_iwi.c error = iwi_alloc_cmd_ring(sc, &sc->cmdq); cmdq 363 dev/pci/if_iwi.c fail1: iwi_free_cmd_ring(sc, &sc->cmdq); cmdq 1198 dev/pci/if_iwi.c sc->cmdq.next = (sc->cmdq.next + 1) % IWI_CMD_RING_COUNT; cmdq 1199 dev/pci/if_iwi.c if (--sc->cmdq.queued > 0) cmdq 1200 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.next); cmdq 1231 dev/pci/if_iwi.c desc = &sc->cmdq.desc[sc->cmdq.cur]; cmdq 1238 dev/pci/if_iwi.c bus_dmamap_sync(sc->sc_dmat, sc->cmdq.map, cmdq 1239 dev/pci/if_iwi.c sc->cmdq.cur * sizeof (struct iwi_cmd_desc), cmdq 1242 dev/pci/if_iwi.c DPRINTFN(2, ("sending command idx=%u type=%u len=%u\n", sc->cmdq.cur, cmdq 1245 dev/pci/if_iwi.c sc->cmdq.cur = (sc->cmdq.cur + 1) % IWI_CMD_RING_COUNT; cmdq 1248 dev/pci/if_iwi.c if (++sc->cmdq.queued == 1) { cmdq 1249 dev/pci/if_iwi.c sc->cmdq.next = sc->cmdq.cur; cmdq 1250 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.next); cmdq 2200 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_BASE, sc->cmdq.map->dm_segs[0].ds_addr); cmdq 2202 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.cur); cmdq 2277 dev/pci/if_iwi.c iwi_reset_cmd_ring(sc, &sc->cmdq); cmdq 109 dev/pci/if_iwivar.h struct iwi_cmd_ring cmdq; cmdq 259 dev/pci/if_wpi.c error = wpi_alloc_tx_ring(sc, &sc->cmdq, WPI_CMD_RING_COUNT, 4); cmdq 348 dev/pci/if_wpi.c fail4: wpi_free_tx_ring(sc, &sc->cmdq); cmdq 1364 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->cmdq; cmdq 2027 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->cmdq; cmdq 2277 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->cmdq; cmdq 2415 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->cmdq; cmdq 2912 dev/pci/if_wpi.c wpi_reset_tx_ring(sc, &sc->cmdq); cmdq 145 dev/pci/if_wpivar.h struct wpi_tx_ring cmdq;