bx                160 arch/i386/i386/apm.c 	u_int32_t	bx;
bx                355 arch/i386/i386/apm.c 	apm_record_event(sc, regs->bx);
bx                385 arch/i386/i386/apm.c 	switch (regs->bx) {
bx                395 arch/i386/i386/apm.c 		if (apm_record_event(sc, regs->bx)) {
bx                410 arch/i386/i386/apm.c 		if (apm_record_event(sc, regs->bx)) {
bx                420 arch/i386/i386/apm.c 		if (apm_record_event(sc, regs->bx)) {
bx                435 arch/i386/i386/apm.c 		if (apm_record_event(sc, regs->bx)) {
bx                449 arch/i386/i386/apm.c 		apm_record_event(sc, regs->bx);
bx                466 arch/i386/i386/apm.c 		apm_record_event(sc, regs->bx);
bx                470 arch/i386/i386/apm.c 		apm_record_event(sc, regs->bx);
bx                476 arch/i386/i386/apm.c 		apm_record_event(sc, regs->bx);
bx                494 arch/i386/i386/apm.c 		switch (regs->bx >> 8) {
bx                501 arch/i386/i386/apm.c 		DPRINTF(("apm_handle_event: %s event, code %d\n", p, regs->bx));
bx                144 arch/i386/include/apmvar.h #define		BATT_STATE(regp) ((regp)->bx & 0xff)
bx                146 arch/i386/include/apmvar.h #define		AC_STATE(regp) (((regp)->bx & 0xff00) >> 8)
bx                205 arch/i386/include/apmvar.h #define		APM_NBATTERIES(regp)	((regp)->bx)
bx                349 arch/i386/pci/pcibios.c 	u_int32_t ax, bx, cx, edx;
bx                362 arch/i386/pci/pcibios.c 		: "=a" (ax), "=b" (bx), "=c" (cx), "=d" (edx)
bx                380 arch/i386/pci/pcibios.c 	*rev_maj = (bx >> 8) & 0xff;
bx                381 arch/i386/pci/pcibios.c 	*rev_min = bx & 0xff;
bx                391 arch/i386/pci/pcibios.c 	u_int32_t ax, bx;
bx                415 arch/i386/pci/pcibios.c 		: "=a" (ax), "=b" (bx)
bx                424 arch/i386/pci/pcibios.c 	*exclirq |= bx;
bx                122 arch/i386/stand/libsa/pxe.h 	uint16_t	bx;