root/dev/usb/umct.h

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INCLUDED FROM


    1 /*      $OpenBSD: umct.h,v 1.3 2002/06/11 06:42:17 nate Exp $   */
    2 /*      $NetBSD: umct.h,v 1.1 2001/03/28 18:42:13 ichiro Exp $  */
    3 /*
    4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Ichiro FUKUHARA (ichiro@ichiro.org).
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *        This product includes software developed by the NetBSD
   21  *        Foundation, Inc. and its contributors.
   22  * 4. Neither the name of The NetBSD Foundation nor the names of its
   23  *    contributors may be used to endorse or promote products derived
   24  *    from this software without specific prior written permission.
   25  *
   26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   36  * POSSIBILITY OF SUCH DAMAGE.
   37  */
   38 
   39 /*
   40  * Vendor Request Interface
   41  */
   42 #define UMCT_SET_REQUEST        0x40
   43 #define UMCT_GET_REQUEST        0xc0
   44 
   45 #define REQ_SET_BAUD_RATE       5       /* Set Baud Rate Divisor */
   46 #define LENGTH_BAUD_RATE        4
   47 
   48 #define REQ_GET_MSR             2       /* Get Modem Status Register (MSR) */
   49 #define LENGTH_GET_MSR          1
   50 
   51 #define REQ_GET_LCR             6       /* Get Line Control Register (LCR) */
   52 #define LENGTH_GET_LCR          1
   53 
   54 #define REQ_SET_LCR             7       /* Set Line Control Register (LCR) */
   55 #define LENGTH_SET_LCR          1
   56 
   57 #define REQ_SET_MCR             10      /* Set Modem Control Register (MCR) */
   58 #define LENGTH_SET_MCR          1
   59 
   60 /*
   61  * Baud rate (divisor)
   62  */
   63 #define UMCT_BAUD_RATE(b)       (115200/b)
   64 
   65 /*
   66  * Line Control Register (LCR)
   67  */
   68 #define LCR_SET_BREAK           0x40
   69 #define LCR_PARITY_EVEN         0x18
   70 #define LCR_PARITY_ODD          0x08
   71 #define LCR_PARITY_NONE         0x00
   72 #define LCR_DATA_BITS_5         0x00
   73 #define LCR_DATA_BITS_6         0x01
   74 #define LCR_DATA_BITS_7         0x02
   75 #define LCR_DATA_BITS_8         0x03
   76 #define LCR_STOP_BITS_2         0x04
   77 #define LCR_STOP_BITS_1         0x00
   78 
   79 /*
   80  * Modem Control Register (MCR)
   81  */
   82 #define MCR_NONE                0x8
   83 #define MCR_RTS                 0xa
   84 #define MCR_DTR                 0x9
   85 
   86 /*
   87  * Modem Status Register (MSR)
   88  */
   89 #define MSR_CD                  0x80    /* Current CD */
   90 #define MSR_RI                  0x40    /* Current RI */
   91 #define MSR_DSR                 0x20    /* Current DSR */
   92 #define MSR_CTS                 0x10    /* Current CTS */
   93 #define MSR_DCD                 0x08    /* Delta CD */
   94 #define MSR_DRI                 0x04    /* Delta RI */
   95 #define MSR_DDSR                0x02    /* Delta DSR */
   96 #define MSR_DCTS                0x01    /* Delta CTS */
   97 
   98 /*
   99  * Line Status Register (LSR)
  100  */
  101 #define LSR_ERR                 0x80    /* OE | PE | FE | BI */
  102 #define LSR_TEMT                0x40    /* transmit register empty */
  103 #define LSR_THRE                0x20    /* transmit holding register empty */
  104 #define LSR_BI                  0x10    /* break indicator */
  105 #define LSR_FE                  0x08    /* framing error */
  106 #define LSR_OE                  0x02    /* overrun error */
  107 #define LSR_PE                  0x04    /* parity error */
  108 #define LSR_OE                  0x02    /* overrun error */
  109 #define LSR_DR                  0x01    /* receive data ready */

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