1 /* $OpenBSD: xboxreg.h,v 1.1 2005/03/05 01:44:52 miod Exp $ */
2
3 /*
4 * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define X_WRITE0_OFFSET 0
30
31 #define XAC_ERR_OFFSET 0x2000
32 #define XAC_CTL0_OFFSET 0x100000 /* control reg 0 */
33 #define XAC_CTL1_OFFSET 0x110000 /* control reg 1 */
34 #define XAC_ELUA_OFFSET 0x120000
35 #define XAC_ELLA_OFFSET 0x130000
36 #define XAC_ERR_EN_OFFSET 0x140000 /* error enable */
37
38 #define XBC_ERR_OFFSET 0x420000
39 #define XBC_CTL0_OFFSET 0x500000 /* control reg 0 */
40 #define XBC_CTL1_OFFSET 0x510000 /* control reg 1 */
41 #define XBC_ELUA_OFFSET 0x520000
42 #define XBC_ELLA_OFFSET 0x530000
43 #define XBC_ERR_EN_OFFSET 0x540000 /* error enable */
44
45 /*
46 * Error registers
47 */
48
49 #define XERR_DESCR 0 /* error descriptor */
50 #define XERR_VA 4 /* error virtual addr */
51 #define XERR_STAT 8 /* error status */
52
53 /*
54 * Control register 1
55 */
56 #define XBOX_CTL1_CDPTE1 0x8000 /* cable data parity test enb */
57 #define XBOX_CTL1_CRTE 0x4000 /* cable rerun test enb */
58 #define XBOX_CTL1_SRST 0x3000 /* software reset mask */
59 #define XBOX_CTL1_SRST_XARS 0x1000
60 #define XBOX_CTL1_SRST_CRES 0x2000
61 #define XBOX_CTL1_SRST_HRES 0x3000
62 #define XBOX_CTL1_DTE 0x0800 /* dvma test enb */
63 #define XBOX_CTL1_CDPTE 0x0400 /* cable data parity test enb */
64 #define XBOX_CTL1_ITE 0x0200 /* interrupt test enb */
65 #define XBOX_CTL1_CDPTE0 0x0100 /* cable data parity test enb, dpr0 */
66 #define XBOX_CTL1_ELDS 0x00c0 /* error log dvma size */
67 #define XBOX_CTL1_XSSE 0x0020 /* expansion sbus slot select enb */
68 #define XBOX_CTL1_XSBRE 0x0010 /* expansion sbus bus request enb */
69 #define XBOX_CTL1_XSIE 0x0008 /* expansion sbus interrupt enb */
70 #define XBOX_CTL1_ELDE 0x0004 /* error log dvma enable */
71 #define XBOX_CTL1_CSIE 0x0002 /* cable serial interrupt enb */
72 #define XBOX_CTL1_TRANSPARENT 0x0001 /* transparent mode enb */