sdla_bus_read_4   967 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4   989 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4  1003 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4  1055 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4  1081 dev/pci/if_san_xilinx.c 		sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4  1127 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_DMA_RX_INTR_PENDING_REG, &tmp);
sdla_bus_read_4  1128 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_DMA_TX_INTR_PENDING_REG, &tmp);
sdla_bus_read_4  1129 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_HDLC_RX_INTR_PENDING_REG, &tmp);
sdla_bus_read_4  1130 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_HDLC_TX_INTR_PENDING_REG, &tmp);
sdla_bus_read_4  1131 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, (u_int32_t *)&reg);
sdla_bus_read_4  1178 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4  1274 dev/pci/if_san_xilinx.c 			sdla_bus_read_4(card->hw,
sdla_bus_read_4  1316 dev/pci/if_san_xilinx.c 				sdla_bus_read_4(card->hw,
sdla_bus_read_4  1363 dev/pci/if_san_xilinx.c 			sdla_bus_read_4(card->hw,
sdla_bus_read_4  1387 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, &reg);
sdla_bus_read_4  1423 dev/pci/if_san_xilinx.c 		sdla_bus_read_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, &reg);
sdla_bus_read_4  1436 dev/pci/if_san_xilinx.c 				sdla_bus_read_4(card->hw,
sdla_bus_read_4  1510 dev/pci/if_san_xilinx.c 			sdla_bus_read_4(card->hw, dma_descr, &reg);
sdla_bus_read_4  1558 dev/pci/if_san_xilinx.c 			sdla_bus_read_4(card->hw, dma_descr, &reg);
sdla_bus_read_4  1593 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_GLOBAL_INTER_MASK, &reg);
sdla_bus_read_4  1612 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_GLOBAL_INTER_MASK, &reg);
sdla_bus_read_4  1629 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, &reg);
sdla_bus_read_4  1663 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, dma_descr, &reg);
sdla_bus_read_4  1804 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, dma_descr, &reg);
sdla_bus_read_4  1940 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, dma_descr, &reg);
sdla_bus_read_4  2085 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, dma_descr, &rx_el->align);
sdla_bus_read_4  2089 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, dma_descr, &rx_el->reg);
sdla_bus_read_4  2374 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_DMA_CONTROL_REG, &reg);
sdla_bus_read_4  2572 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_HDLC_TX_INTR_PENDING_REG, &tx_status);
sdla_bus_read_4  2573 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_HDLC_RX_INTR_PENDING_REG, &rx_status);
sdla_bus_read_4  2675 dev/pci/if_san_xilinx.c 				sdla_bus_read_4(card->hw, dma_descr, &reg);
sdla_bus_read_4  2732 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4  2781 dev/pci/if_san_xilinx.c 		sdla_bus_read_4(card->hw, XILINX_DMA_RX_INTR_PENDING_REG,
sdla_bus_read_4  2808 dev/pci/if_san_xilinx.c 		sdla_bus_read_4(card->hw, XILINX_DMA_TX_INTR_PENDING_REG,
sdla_bus_read_4  3032 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_DMA_RX_INTR_PENDING_REG, &reg);
sdla_bus_read_4  3033 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_DMA_TX_INTR_PENDING_REG, &reg);
sdla_bus_read_4  3060 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_DMA_CONTROL_REG, &reg);
sdla_bus_read_4  3146 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_HDLC_RX_INTR_PENDING_REG, &reg);
sdla_bus_read_4  3147 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_HDLC_TX_INTR_PENDING_REG, &reg);
sdla_bus_read_4  3151 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4  3164 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4  3172 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_DMA_CONTROL_REG, &reg);
sdla_bus_read_4  3263 dev/pci/if_san_xilinx.c 		sdla_bus_read_4(card->hw, XILINX_TIMESLOT_HDLC_CHAN_REG, &reg);
sdla_bus_read_4  3473 dev/pci/if_san_xilinx.c 	sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &led);
sdla_bus_read_4  3551 dev/pci/if_san_xilinx.c 		sdla_bus_read_4(card->hw, XILINX_CHIP_CFG_REG, &reg);
sdla_bus_read_4   982 dev/pci/if_sandrv.c 		sdla_bus_read_4(hw, offset, (u_int32_t*)buf);
sdla_bus_read_4   318 dev/pci/if_sandrv.h extern int sdla_bus_read_4(void*, unsigned int, u_int32_t*);