BL0                57 dev/ic/osiopreg.h #define OSIOP_SCNTL0	(0x00+BL0)	/* rw: SCSI control reg 0 */
BL0                62 dev/ic/osiopreg.h #define OSIOP_SCID	(0x04+BL0)	/* rw: SCSI Chip ID reg */
BL0                67 dev/ic/osiopreg.h #define OSIOP_SFBR	(0x08+BL0)	/* ro: SCSI First Byte Received */
BL0                72 dev/ic/osiopreg.h #define OSIOP_DSTAT	(0x0c+BL0)	/* ro: DMA status */
BL0                79 dev/ic/osiopreg.h #define OSIOP_CTEST0	(0x14+BL0)	/* ro: Chip test register 0 */
BL0                84 dev/ic/osiopreg.h #define OSIOP_CTEST4	(0x18+BL0)	/* rw: Chip test register 4 */
BL0                91 dev/ic/osiopreg.h #define OSIOP_DFIFO	(0x20+BL0)	/* rw: DMA FIFO */
BL0                97 dev/ic/osiopreg.h #define OSIOP_DBC0	(0x24+BL0)	/* rw: DMA Byte Counter reg 0 */
BL0               110 dev/ic/osiopreg.h #define OSIOP_DMODE	(0x38+BL0)	/* rw: DMA Mode reg */