inw 129 arch/i386/include/bus.h ((t) == I386_BUS_SPACE_IO ? (inw((h) + (o))) : \ inw 793 dev/isa/aria.c outw(iobase+ARIADSP_CONTROL, (inw(iobase+ARIADSP_STATUS)&~0x60)|samp); /* Addition parm for sample rate */ inw 950 dev/isa/aria.c return inw(iobase+ARIADSP_DMADATA); inw 969 dev/isa/aria.c for (i = ARIAR_NPOLL; (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY) != 0 && i>0; i-- ) inw 972 dev/isa/aria.c fail |= (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY)==0?0:1; inw 976 dev/isa/aria.c for (i = ARIAR_NPOLL; (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY) != 0 && i>0; i-- ) inw 979 dev/isa/aria.c fail |= (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY)==0?0:2; inw 984 dev/isa/aria.c for (i = ARIAR_NPOLL; (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY) != 0 && i>0; i-- ) inw 987 dev/isa/aria.c fail |= (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY)==0?0:4; inw 992 dev/isa/aria.c for (i = ARIAR_NPOLL; (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY) != 0 && i>0; i-- ) inw 995 dev/isa/aria.c fail |= (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY)==0?0:8; inw 999 dev/isa/aria.c for (i = ARIAR_NPOLL; (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY) != 0 && i>0; i-- ) inw 1002 dev/isa/aria.c fail |= (inw(iobase + ARIADSP_STATUS) & ARIAR_BUSY)==0?0:16; inw 1160 dev/isa/aria.c if (inw(iobase) & 1 != 0x1) inw 311 dev/isa/pss.c if (inw(pss_base+PSS_STATUS) & PSS_WRITE_EMPTY) { inw 327 dev/isa/pss.c val = inw(configAddr); inw 347 dev/isa/pss.c val = inw(configAddress); inw 352 dev/isa/pss.c val = inw(configAddress); inw 357 dev/isa/pss.c val = inw(configAddress); inw 362 dev/isa/pss.c val = inw(configAddress); inw 367 dev/isa/pss.c val = inw(configAddress); inw 372 dev/isa/pss.c val = inw(configAddress); inw 377 dev/isa/pss.c val = inw(configAddress); inw 398 dev/isa/pss.c val = inw(configAddress); inw 403 dev/isa/pss.c val = inw(configAddress); inw 408 dev/isa/pss.c val = inw(configAddress); inw 413 dev/isa/pss.c val = inw(configAddress); inw 418 dev/isa/pss.c val = inw(configAddress); inw 423 dev/isa/pss.c val = inw(configAddress); inw 452 dev/isa/pss.c val = inw(config); inw 456 dev/isa/pss.c val = inw(config); inw 461 dev/isa/pss.c val = inw(config); inw 466 dev/isa/pss.c val = inw(config); inw 471 dev/isa/pss.c val = inw(config); inw 476 dev/isa/pss.c val = inw(config); inw 481 dev/isa/pss.c val = inw(config); inw 495 dev/isa/pss.c val = inw(config); inw 503 dev/isa/pss.c val = inw(config); inw 526 dev/isa/pss.c val = inw(config); inw 531 dev/isa/pss.c val = inw(config); inw 536 dev/isa/pss.c val = inw(config); inw 541 dev/isa/pss.c val = inw(config); inw 546 dev/isa/pss.c val = inw(config); inw 551 dev/isa/pss.c val = inw(config); inw 565 dev/isa/pss.c val = inw(config); inw 573 dev/isa/pss.c val = inw(config); inw 590 dev/isa/pss.c inw(pss_base+PSS_CONTROL); inw 623 dev/isa/pss.c if (inw(pss_base+PSS_DATA) == 0x5500) inw 636 dev/isa/pss.c if (inw(pss_base+PSS_STATUS) & PSS_FLAG3) inw 657 dev/isa/pss.c (void) inw(pss_base+PSS_STATUS); inw 662 dev/isa/pss.c val = inw(pss_base+PSS_STATUS); inw 669 dev/isa/pss.c val = inw(pss_base+PSS_STATUS); inw 676 dev/isa/pss.c (void) inw(pss_base+PSS_DATA); inw 698 dev/isa/pss.c (u_short)inw(sc->sc_iobase+PSS_STATUS), inw 699 dev/isa/pss.c (u_short)inw(sc->sc_iobase+PSS_ID_VERS)); inw 702 dev/isa/pss.c (u_short)inw(sc->sc_iobase+PSS_CONFIG), inw 703 dev/isa/pss.c (u_short)inw(sc->sc_iobase+PSS_WSS_CONFIG)); inw 729 dev/isa/pss.c if ((inw(iobase+PSS_ID_VERS) & 0xff00) == 0x4500) inw 733 dev/isa/pss.c if ((inw(iobase+PSS_ID_VERS) & 0xff00) == 0x4500) inw 739 dev/isa/pss.c else if ((inw(iobase+PSS_ID_VERS) & 0xff00) != 0x4500) { inw 740 dev/isa/pss.c DPRINTF(("pss: not a PSS - %x\n", inw(iobase+PSS_ID_VERS))); inw 796 dev/isa/pss.c outw(sc->sc_iobase+PSS_STATUS, inw(sc->sc_iobase+PSS_STATUS) | GAME_BIT); inw 798 dev/isa/pss.c outw(sc->sc_iobase+PSS_STATUS, inw(sc->sc_iobase+PSS_STATUS) & GAME_BIT_MASK); inw 968 dev/isa/pss.c val = inw(pc->sc_iobase+CD_CONFIG); inw 1027 dev/isa/pss.c vers = (inw(sc->sc_iobase+PSS_ID_VERS)&0xff) - 1; inw 1259 dev/isa/pss.c sr = inw(sc->sc_iobase+PSS_STATUS);