inb 349 arch/i386/i386/machdep.c return inb(0x23);
inb 990 arch/i386/i386/mpbios.c mp_busses[bus_id].mb_data = inb(ELCR0) | (inb(ELCR1) << 8);
inb 125 arch/i386/include/bus.h ((t) == I386_BUS_SPACE_IO ? (inb((h) + (o))) : \
inb 126 arch/i386/include/i8259.h inb $0x84,%al ;\
inb 135 arch/i386/include/i8259.h inb $0x84,%al ;\
inb 154 arch/i386/isa/clock.c v = inb(IO_RTC+1);
inb 269 arch/i386/isa/clock.c v1 = inb(IO_TIMER1 + TIMER_CNTR0);
inb 270 arch/i386/isa/clock.c v1 |= inb(IO_TIMER1 + TIMER_CNTR0) << 8;
inb 271 arch/i386/isa/clock.c v2 = inb(IO_TIMER1 + TIMER_CNTR0);
inb 272 arch/i386/isa/clock.c v2 |= inb(IO_TIMER1 + TIMER_CNTR0) << 8;
inb 273 arch/i386/isa/clock.c v3 = inb(IO_TIMER1 + TIMER_CNTR0);
inb 274 arch/i386/isa/clock.c v3 |= inb(IO_TIMER1 + TIMER_CNTR0) << 8;
inb 320 arch/i386/isa/clock.c lo = inb(IO_TIMER1 + TIMER_CNTR0);
inb 321 arch/i386/isa/clock.c hi = inb(IO_TIMER1 + TIMER_CNTR0);
inb 732 arch/i386/isa/clock.c lo = inb(IO_TIMER1 + TIMER_CNTR0);
inb 733 arch/i386/isa/clock.c hi = inb(IO_TIMER1 + TIMER_CNTR0);
inb 107 arch/i386/isa/joy.c state = inb(port);
inb 171 arch/i386/isa/joy.c low = inb(IO_TIMER1 + TIMER_CNTR0);
inb 172 arch/i386/isa/joy.c high = inb(IO_TIMER1 + TIMER_CNTR0);
inb 68 arch/i386/isa/joy_isa.c return (inb(iobase) & 0x0f) != 0x0f;
inb 89 arch/i386/isa/joy_isa.c (inb(iobase) & 0x0f) == 0x0f ? " not " : " ");
inb 78 arch/i386/isa/joy_isapnp.c (inb(iobase) & 0x0f) == 0x0f ? " not " : " ");
inb 401 arch/i386/pci/pci_machdep.c if (inb(PCI_MODE2_ENABLE_REG) != 0 ||
inb 402 arch/i386/pci/pci_machdep.c inb(PCI_MODE2_FORWARD_REG) != 0)
inb 58 arch/i386/stand/libsa/bioscons.c if ((inb(IO_RTC+1) & PRESENT_MASK) == PRESENT_MASK) {
inb 62 arch/i386/stand/libsa/gateA20.c (inb(IO_KBD + KBSTATP) == 0xff && inb(IO_KBD + KBDATAP) == 0xff)) {
inb 67 arch/i386/stand/libsa/gateA20.c data = inb(0x92);
inb 70 arch/i386/stand/libsa/gateA20.c data = inb(0x92);
inb 75 arch/i386/stand/libsa/gateA20.c while (inb(IO_KBD + KBSTATP) & KBS_IBF);
inb 77 arch/i386/stand/libsa/gateA20.c while (inb(IO_KBD + KBSTATP) & KBS_DIB)
inb 78 arch/i386/stand/libsa/gateA20.c (void)inb(IO_KBD + KBDATAP);
inb 81 arch/i386/stand/libsa/gateA20.c while (inb(IO_KBD + KBSTATP) & KBS_IBF);
inb 87 arch/i386/stand/libsa/gateA20.c while (inb(IO_KBD + KBSTATP) & KBS_IBF);
inb 89 arch/i386/stand/libsa/gateA20.c while (inb(IO_KBD + KBSTATP) & KBS_DIB)
inb 90 arch/i386/stand/libsa/gateA20.c (void)inb(IO_KBD + KBDATAP);
inb 172 dev/ic/pdqvar.h #define PDQ_OS_IORD_8(t, base, offset) inb((base) + (offset))
inb 260 dev/ic/pdqvar.h #define PDQ_OS_IORD_8(port) inb(port)
inb 248 dev/isa/aha.c sts = inb(iobase + AHA_STAT_PORT);
inb 264 dev/isa/aha.c while ((inb(iobase + AHA_STAT_PORT)) & AHA_STAT_DF)
inb 265 dev/isa/aha.c inb(iobase + AHA_DATA_PORT);
inb 273 dev/isa/aha.c sts = inb(iobase + AHA_STAT_PORT);
inb 293 dev/isa/aha.c sts = inb(iobase + AHA_STAT_PORT);
inb 305 dev/isa/aha.c *obuf++ = inb(iobase + AHA_DATA_PORT);
inb 314 dev/isa/aha.c sts = inb(iobase + AHA_INTR_PORT);
inb 532 dev/isa/aha.c sts = inb(iobase + AHA_INTR_PORT);
inb 939 dev/isa/aha.c sts = inb(iobase + AHA_STAT_PORT);
inb 1185 dev/isa/aha.c sts = inb(iobase + AHA_STAT_PORT);
inb 1424 dev/isa/aha.c if (inb(iobase + AHA_INTR_PORT) & AHA_INTR_ANYINTR) {
inb 366 dev/isa/aria.c end = inb(rba);
inb 369 dev/isa/aria.c inb(0x200);
inb 397 dev/isa/aria.c i = inb(rba);
inb 140 dev/isa/if_el.c station_addr[i] = inb(iobase+EL_EAW);
inb 360 dev/isa/if_el.c i = inb(iobase+EL_TXS);
inb 385 dev/isa/if_el.c (void)inb(iobase+EL_AS);
inb 392 dev/isa/if_el.c (void)inb(iobase+EL_AS);
inb 419 dev/isa/if_el.c while ((inb(iobase+EL_AS) & EL_AS_TXBUSY) && (i > 0))
inb 443 dev/isa/if_el.c if ((inb(iobase+EL_AS) & EL_AS_RXBUSY) != 0) {
inb 444 dev/isa/if_el.c (void)inb(iobase+EL_RXC);
inb 450 dev/isa/if_el.c rxstat = inb(iobase+EL_RXS);
inb 463 dev/isa/if_el.c (void)inb(iobase+EL_AS);
inb 469 dev/isa/if_el.c len = inb(iobase+EL_RBL);
inb 470 dev/isa/if_el.c len |= inb(iobase+EL_RBH) << 8;
inb 478 dev/isa/if_el.c if ((inb(iobase+EL_AS) & EL_AS_RXBUSY) != 0)
inb 484 dev/isa/if_el.c (void)inb(iobase+EL_RXC);
inb 400 dev/isa/if_ie.c c = inb(PORT + IEATT_REVISION);
inb 489 dev/isa/if_ie.c outb(PORT + IE507_CTRL, inb(PORT + IE507_CTRL) & 0xfc); /* XXX */
inb 491 dev/isa/if_ie.c if (inb(PORT + i) != signature[i])
inb 494 dev/isa/if_ie.c c = inb(PORT + IE507_MADDR);
inb 508 dev/isa/if_ie.c i = inb(PORT + 3);
inb 513 dev/isa/if_ie.c i = inb(PORT + IE507_IRQ) & 0x0f;
inb 524 dev/isa/if_ie.c i = ((inb(PORT + IE507_MADDR) & 0x1c) << 12) + 0xc0000;
inb 598 dev/isa/if_ie.c id_var1 = inb(ia->ia_iobase + IEE16_ID_PORT);
inb 754 dev/isa/if_ie.c bart_config = inb(PORT + IEE16_CONFIG);
inb 758 dev/isa/if_ie.c bart_config = inb(PORT + IEE16_CONFIG);
inb 1690 dev/isa/if_ie.c ectrl = inb(PORT + IEE16_ECTRL);
inb 1698 dev/isa/if_ie.c ectrl = inb(PORT + IEE16_ECTRL);
inb 1713 dev/isa/if_ie.c ectrl = inb(PORT + IEE16_ECTRL);
inb 1736 dev/isa/if_ie.c ectrl = inb(PORT + IEE16_ECTRL);
inb 1741 dev/isa/if_ie.c ectrl = inb(PORT + IEE16_ECTRL);
inb 1757 dev/isa/if_ie.c ectrl = inb(PORT + IEE16_ECTRL);
inb 1782 dev/isa/if_ie.c addr[i] = inb(PORT + i);
inb 2097 dev/isa/if_ie.c bart_config = inb(PORT + IEE16_CONFIG);
inb 208 dev/isa/opti.c return inb( port );
inb 280 dev/isa/opti.c (inb( OPTI_DATA ) & 0xe3) |
inb 289 dev/isa/opti.c (inb( OPTI_DATA ) & 0xfc) |
inb 160 dev/isa/pas.c #define pasread(p) inb(p)
inb 318 dev/isa/pas.c t = inb(INTERRUPT_MASK);
inb 689 dev/isa/pss.c (u_char)inb(sc->sc_iobase-WSS_CODEC+WSS_STATUS));
inb 896 dev/isa/pss.c if ((inb(sc->sc_iobase+WSS_STATUS) & 0x40) == 0) /* XXX What do these bits mean ? */
inb 897 dev/isa/pss.c DPRINTF(("sp: IRQ %x\n", inb(sc->sc_iobase+WSS_STATUS)));
inb 1283 dev/isa/pss.c sr = inb(sc->sc_iobase+MIDI_STATUS_REG);