bit_test         2465 dev/pci/if_san_te1.c 	if (!bit_test((u_int8_t*)&card->fe_te.te_critical, TE_CONFIGURED)) {
bit_test         2500 dev/pci/if_san_te1.c 			if (!bit_test((u_int8_t*)&card->fe_te.te_critical,
bit_test         2993 dev/pci/if_san_te1.c 				if (bit_test((u_int8_t *)
bit_test         2995 dev/pci/if_san_te1.c 				    bit_test((u_int8_t *)
bit_test         3013 dev/pci/if_san_te1.c 				if (bit_test(
bit_test         3016 dev/pci/if_san_te1.c 				    bit_test(
bit_test         3631 dev/pci/if_san_te1.c 	if (bit_test((u_int8_t*)&card->fe_te.te_critical,TE_TIMER_KILL)) {
bit_test         3654 dev/pci/if_san_te1.c 	if (bit_test((u_int8_t*)&card->fe_te.te_critical, TE_TIMER_KILL)) {
bit_test         3761 dev/pci/if_san_te1.c 	if (bit_test((u_int8_t*)&card->fe_te.te_critical,TE_TIMER_RUNNING))
bit_test         3763 dev/pci/if_san_te1.c 	if (bit_test((u_int8_t*)&card->fe_te.te_critical,LINELB_WAITING)) {
bit_test          698 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&card->in_isr, 0))
bit_test          781 dev/pci/if_san_xilinx.c 			if (!bit_test((u_int8_t *)
bit_test          821 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)
bit_test          843 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)
bit_test         1132 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&reg, DMA_INTR_FLAG)) {
bit_test         1142 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&reg, ERROR_INTR_FLAG)) {
bit_test         1229 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&sc->time_slot_map, i)) {
bit_test         1244 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)
bit_test         1270 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&sc->time_slot_map, i)) {
bit_test         1313 dev/pci/if_san_xilinx.c 			if (!bit_test((u_int8_t *)
bit_test         1435 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&sc->time_slot_map, i)) {
bit_test         1469 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&sc->time_slot_map, i))
bit_test         1478 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&sc->time_slot_map, i))
bit_test         1511 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&reg, INIT_DMA_FIFO_CMD_BIT)) {
bit_test         1559 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&reg, INIT_DMA_FIFO_CMD_BIT)) {
bit_test         1665 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&reg, RxDMA_HI_DMA_GO_READY_BIT)) {
bit_test         1763 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&sc->dma_status, TX_BUSY)) {
bit_test         1806 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&reg, TxDMA_HI_DMA_GO_READY_BIT)) {
bit_test         1998 dev/pci/if_san_xilinx.c 	if ((bit_test((u_int8_t *)&reg, TxDMA_HI_DMA_GO_READY_BIT)) ||
bit_test         2008 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&reg, TxDMA_HI_DMA_GO_READY_BIT))
bit_test         2136 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&rx_el->reg, RxDMA_HI_DMA_GO_READY_BIT)) {
bit_test         2172 dev/pci/if_san_xilinx.c 	if (!bit_test((u_int8_t *)&rx_el->reg, RxDMA_HI_DMA_FRAME_START_BIT)) {
bit_test         2183 dev/pci/if_san_xilinx.c 	if (!bit_test((u_int8_t *)&rx_el->reg, RxDMA_HI_DMA_FRAME_END_BIT)) {
bit_test         2194 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&rx_el->reg,
bit_test         2210 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&rx_el->reg,
bit_test         2241 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&rx_el->pkt_error, WP_FIFO_ERROR_BIT)) {
bit_test         2309 dev/pci/if_san_xilinx.c 		if (!bit_test((u_int8_t *)&card->u.xilinx.logic_ch_map, i)) {
bit_test         2320 dev/pci/if_san_xilinx.c 		if (!bit_test((u_int8_t *)&card->u.xilinx.logic_ch_map, i)) {
bit_test         2586 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&tx_status, i) &&
bit_test         2587 dev/pci/if_san_xilinx.c 			    bit_test((u_int8_t *)&card->u.xilinx.logic_ch_map,
bit_test         2633 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&rx_status, i) &&
bit_test         2634 dev/pci/if_san_xilinx.c 			    bit_test((u_int8_t *)&card->u.xilinx.logic_ch_map,
bit_test         2717 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&card->critical, CARD_DOWN)) {
bit_test         2734 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&reg, SECURITY_STATUS_FLAG)) {
bit_test         2749 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&reg, FRONT_END_INTR_ENABLE_BIT)) {
bit_test         2750 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&reg, FRONT_END_INTR_FLAG)) {
bit_test         2767 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&reg, ERROR_INTR_ENABLE_BIT))
bit_test         2768 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&reg, ERROR_INTR_FLAG))
bit_test         2777 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&reg, GLOBAL_INTR_ENABLE_BIT) &&
bit_test         2778 dev/pci/if_san_xilinx.c 		bit_test((u_int8_t *)&reg, DMA_INTR_FLAG)) {
bit_test         2790 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&dma_rx_reg, i) &&
bit_test         2791 dev/pci/if_san_xilinx.c 				bit_test((u_int8_t *)
bit_test         2817 dev/pci/if_san_xilinx.c 			if (bit_test((u_int8_t *)&dma_tx_reg, i) &&
bit_test         2818 dev/pci/if_san_xilinx.c 				bit_test((u_int8_t *)
bit_test         3480 dev/pci/if_san_xilinx.c 		if (bit_test((u_int8_t *)&led, XILINX_RED_LED))
bit_test         3495 dev/pci/if_san_xilinx.c 	if (bit_test((u_int8_t *)&card->critical, CARD_DOWN))
bit_test         3552 dev/pci/if_san_xilinx.c 		if (!bit_test((u_int8_t *)&reg, HDLC_CORE_READY_FLAG_BIT)) {