BA1WRITE4         475 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CSRC, tmp1);
BA1WRITE4         478 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CSRC, CS4280_MK_CSRC(csrc, cy));
BA1WRITE4         489 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CCI, tmp1);
BA1WRITE4         491 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CCI, cci);
BA1WRITE4         496 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CD, tmp1);
BA1WRITE4         498 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CPI, cpi);
BA1WRITE4         502 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CGL, tmp1);
BA1WRITE4         504 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CNT, cnt);
BA1WRITE4         508 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CGC, tmp1);
BA1WRITE4         549 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PSRC,
BA1WRITE4         553 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PSRC, CS4280_MK_PSRC(psrc,py));
BA1WRITE4         555 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PPI, ppi);
BA1WRITE4         708 dev/pci/cs4280.c 		BA1WRITE4(sc, CS4280_PFIE, (mem & ~PFIE_PI_MASK) | PFIE_PI_DISABLE);
BA1WRITE4         724 dev/pci/cs4280.c 		BA1WRITE4(sc, CS4280_PFIE, mem);
BA1WRITE4         733 dev/pci/cs4280.c 		BA1WRITE4(sc, CS4280_CIE, (mem & ~CIE_CI_MASK) | CIE_CI_DISABLE);
BA1WRITE4         779 dev/pci/cs4280.c 		BA1WRITE4(sc, CS4280_CIE, mem);
BA1WRITE4         853 dev/pci/cs4280.c 		BA1WRITE4(sc, offset+ctr*4, htole32(*(src+ctr)));
BA1WRITE4        1011 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_SPCR, SPCR_RSTSP);
BA1WRITE4        1014 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_SPCR, 0);
BA1WRITE4        1016 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_SPCR, SPCR_DRQEN);
BA1WRITE4        1297 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PCTL, mem & ~PCTL_MASK);
BA1WRITE4        1312 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CCTL, mem & ~CCTL_MASK);
BA1WRITE4        1494 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PCTL, mem & ~PCTL_MASK);
BA1WRITE4        1500 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PDTC, pdtc);
BA1WRITE4        1534 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PBA, DMAADDR(p));
BA1WRITE4        1551 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PFIE, pfie | PFIE_PI_ENABLE);
BA1WRITE4        1557 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PCTL, pctl);
BA1WRITE4        1603 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CCTL, cctl);
BA1WRITE4        1620 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CBA, DMAADDR(p));
BA1WRITE4        1624 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CIE, cie | CIE_CI_ENABLE);
BA1WRITE4        1630 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CCTL, cctl);
BA1WRITE4        1762 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_FRMT, FRMT_FTV);
BA1WRITE4        1763 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
BA1WRITE4        1786 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PVOL, 0x80008000);
BA1WRITE4        1787 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CVOL, 0x80008000);
BA1WRITE4        1795 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_PFIE, mem);
BA1WRITE4        1799 dev/pci/cs4280.c 	BA1WRITE4(sc, CS4280_CIE, mem);