BA1READ4          473 dev/pci/cs4280.c 	tmp1 = BA1READ4(sc, CS4280_CSRC) & ~CSRC_MASK;
BA1READ4          487 dev/pci/cs4280.c 	tmp1 = BA1READ4(sc, CS4280_CCI) & ~CCI_MASK;
BA1READ4          494 dev/pci/cs4280.c 	tmp1 = BA1READ4(sc, CS4280_CD) & ~CD_MASK;
BA1READ4          500 dev/pci/cs4280.c 	tmp1 = BA1READ4(sc, CS4280_CGL) & ~CGL_MASK;
BA1READ4          506 dev/pci/cs4280.c 	tmp1 = BA1READ4(sc, CS4280_CGC) & ~CGC_MASK;
BA1READ4          548 dev/pci/cs4280.c 	px = BA1READ4(sc, CS4280_PSRC) & ~PSRC_MASK;
BA1READ4          707 dev/pci/cs4280.c 		mem = BA1READ4(sc, CS4280_PFIE);
BA1READ4          732 dev/pci/cs4280.c 		mem = BA1READ4(sc, CS4280_CIE);
BA1READ4          922 dev/pci/cs4280.c 		data = BA1READ4(sc, offset+ctr*4);
BA1READ4         1296 dev/pci/cs4280.c 	mem = BA1READ4(sc, CS4280_PCTL);
BA1READ4         1311 dev/pci/cs4280.c 	mem = BA1READ4(sc, CS4280_CCTL);
BA1READ4         1493 dev/pci/cs4280.c 	mem = BA1READ4(sc, CS4280_PCTL);
BA1READ4         1497 dev/pci/cs4280.c 	pdtc = BA1READ4(sc, CS4280_PDTC);
BA1READ4         1537 dev/pci/cs4280.c 	pfie = BA1READ4(sc, CS4280_PFIE) & ~PFIE_MASK;
BA1READ4         1555 dev/pci/cs4280.c 	pctl = BA1READ4(sc, CS4280_PCTL) & ~PCTL_MASK;
BA1READ4         1602 dev/pci/cs4280.c 	cctl = BA1READ4(sc, CS4280_CCTL) & ~CCTL_MASK;
BA1READ4         1623 dev/pci/cs4280.c 	cie = BA1READ4(sc, CS4280_CIE) & ~CIE_CI_MASK;
BA1READ4         1628 dev/pci/cs4280.c 	cctl = BA1READ4(sc, CS4280_CCTL) & ~CCTL_MASK;
BA1READ4         1747 dev/pci/cs4280.c 	mem = BA1READ4(sc, CS4280_PCTL);
BA1READ4         1755 dev/pci/cs4280.c 	mem = BA1READ4(sc, CS4280_CCTL);
BA1READ4         1767 dev/pci/cs4280.c 	while (BA1READ4(sc, CS4280_SPCR) & SPCR_RUNFR) {
BA1READ4         1776 dev/pci/cs4280.c 	while (!(BA1READ4(sc, CS4280_SPCS) & SPCS_SPRUN)) {
BA1READ4         1793 dev/pci/cs4280.c 	mem = BA1READ4(sc, CS4280_PFIE) & ~PFIE_PI_MASK;
BA1READ4         1797 dev/pci/cs4280.c 	mem = BA1READ4(sc, CS4280_CIE) & ~CIE_CI_MASK;