ad_read 152 dev/isa/ad1848.c static int ad_read(struct ad1848_softc *, int); ad_read 230 dev/isa/ad1848.c if (!(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)) { ad_read 232 dev/isa/ad1848.c while (timeout > 0 && !(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)) ad_read 235 dev/isa/ad1848.c if (!(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)) ad_read 240 dev/isa/ad1848.c while (timeout > 0 && ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG) ad_read 242 dev/isa/ad1848.c if (ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG) ad_read 259 dev/isa/ad1848.c r = ad_read(sc, i); ad_read 264 dev/isa/ad1848.c r = ad_read(sc, i); ad_read 340 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, 0)) != 0xaa || ad_read 341 dev/isa/ad1848.c (tmp2 = ad_read(sc, 1)) != 0x45) { ad_read 349 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, 0)) != 0x45 || ad_read 350 dev/isa/ad1848.c (tmp2 = ad_read(sc, 1)) != 0xaa) { ad_read 359 dev/isa/ad1848.c tmp = ad_read(sc, SP_MISC_INFO); ad_read 362 dev/isa/ad1848.c if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { ad_read 417 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { ad_read 431 dev/isa/ad1848.c tmp1 = ad_read(sc, SP_MISC_INFO); ad_read 441 dev/isa/ad1848.c if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */ ad_read 443 dev/isa/ad1848.c if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */ ad_read 453 dev/isa/ad1848.c tmp1 = ad_read(sc, CS_VERSION_ID); ad_read 536 dev/isa/ad1848.c while (timeout > 0 && ad_read(sc, AD1848_IADDR) & SP_IN_INIT) ad_read 547 dev/isa/ad1848.c ad_read(sc, AD1848_IADDR) & SP_IN_INIT) ad_read 614 dev/isa/ad1848.c reg = ad_read(sc, mixer_channel_info[device].left_reg); ad_read 632 dev/isa/ad1848.c reg = ad_read(sc, mixer_channel_info[device].right_reg); ad_read 656 dev/isa/ad1848.c reg = ad_read(sc, info->left_reg) & (info->atten_mask); ad_read 668 dev/isa/ad1848.c reg = ad_read(sc, info->right_reg); ad_read 707 dev/isa/ad1848.c reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); ad_read 712 dev/isa/ad1848.c reg = ad_read(sc, SP_RIGHT_INPUT_CONTROL); ad_read 749 dev/isa/ad1848.c reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); ad_read 753 dev/isa/ad1848.c reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); ad_read 1129 dev/isa/ad1848.c reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); ad_read 1133 dev/isa/ad1848.c reg = ad_read(sc, SP_RIGHT_INPUT_CONTROL); ad_read 1179 dev/isa/ad1848.c ad_write(sc, SP_PIN_CONTROL, INTERRUPT_ENABLE|ad_read(sc, SP_PIN_CONTROL)); ad_read 1216 dev/isa/ad1848.c ad_read(sc, SP_PIN_CONTROL) & ~INTERRUPT_ENABLE); ad_read 1219 dev/isa/ad1848.c r = ad_read(sc, SP_INTERFACE_CONFIG); ad_read 1317 dev/isa/ad1848.c r = ad_read(sc, SP_INTERFACE_CONFIG); ad_read 1418 dev/isa/ad1848.c reg = ad_read(sc, SP_INTERFACE_CONFIG); ad_read 1434 dev/isa/ad1848.c reg = ad_read(sc, SP_INTERFACE_CONFIG); ad_read 1512 dev/isa/ad1848.c reg = ad_read(sc, SP_INTERFACE_CONFIG); ad_read 1592 dev/isa/ad1848.c reg = ad_read(sc, SP_INTERFACE_CONFIG);