AUVIA_PLAY_BASE   535 dev/pci/auvia.c 			base = AUVIA_PLAY_BASE;
AUVIA_PLAY_BASE   638 dev/pci/auvia.c 	    AUVIA_PLAY_BASE + AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE);
AUVIA_PLAY_BASE   882 dev/pci/auvia.c 	    AUVIA_PLAY_BASE + AUVIA_RP_DMAOPS_BASE,
AUVIA_PLAY_BASE   886 dev/pci/auvia.c 	    AUVIA_PLAY_BASE + AUVIA_RP_MODE, ch->sc_reg);
AUVIA_PLAY_BASE   890 dev/pci/auvia.c 		    AUVIA_PLAY_BASE + VIA8233_RP_DXS_LVOL, 0);
AUVIA_PLAY_BASE   892 dev/pci/auvia.c 		    AUVIA_PLAY_BASE + VIA8233_RP_DXS_RVOL, 0);
AUVIA_PLAY_BASE   894 dev/pci/auvia.c 		    AUVIA_PLAY_BASE + AUVIA_RP_CONTROL,
AUVIA_PLAY_BASE   899 dev/pci/auvia.c 		    AUVIA_PLAY_BASE + AUVIA_RP_CONTROL, AUVIA_RPCTRL_START);
AUVIA_PLAY_BASE   969 dev/pci/auvia.c 	    AUVIA_PLAY_BASE + AUVIA_RP_STAT);
AUVIA_PLAY_BASE   976 dev/pci/auvia.c 		    AUVIA_PLAY_BASE + AUVIA_RP_STAT, AUVIA_RPSTAT_INTR);