WRITE_REG_1 330 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | WRITE_REG_1 347 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_PUB_RESET, WRITE_REG_1 370 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_7811_RNGENA, r); WRITE_REG_1 372 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_7811_RNGCFG, WRITE_REG_1 375 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_7811_RNGENA, r); WRITE_REG_1 377 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_RNG_CONFIG, WRITE_REG_1 392 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_PUB_IEN, HIFN_PUBIEN_DONE); WRITE_REG_1 394 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); WRITE_REG_1 491 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | WRITE_REG_1 502 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MODE); WRITE_REG_1 505 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, WRITE_REG_1 513 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | WRITE_REG_1 657 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_UNLOCK | WRITE_REG_1 662 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_UNLOCK_SECRET2, 0); WRITE_REG_1 667 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_UNLOCK_SECRET2, addr); WRITE_REG_1 684 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, dmacfg); WRITE_REG_1 725 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CRAR, sc->sc_dmamap->dm_segs[0].ds_addr + WRITE_REG_1 727 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_SRAR, sc->sc_dmamap->dm_segs[0].ds_addr + WRITE_REG_1 729 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_DRAR, sc->sc_dmamap->dm_segs[0].ds_addr + WRITE_REG_1 731 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_RRAR, sc->sc_dmamap->dm_segs[0].ds_addr + WRITE_REG_1 737 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, WRITE_REG_1 762 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); WRITE_REG_1 769 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_PLL, HIFN_PLL_7956); WRITE_REG_1 778 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | WRITE_REG_1 974 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, WRITE_REG_1 1017 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, WRITE_REG_1 1039 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, WRITE_REG_1 1082 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, WRITE_REG_1 1547 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA); WRITE_REG_1 1559 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); WRITE_REG_1 1566 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA); WRITE_REG_1 1594 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA); WRITE_REG_1 1605 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA); WRITE_REG_1 1667 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, r); WRITE_REG_1 1696 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, dmacsr & sc->sc_dmaier); WRITE_REG_1 1703 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_PUB_STATUS, WRITE_REG_1 1733 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); WRITE_REG_1 2549 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA); WRITE_REG_1 2561 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); WRITE_REG_1 2568 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA); WRITE_REG_1 2593 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA); WRITE_REG_1 2604 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA); WRITE_REG_1 176 dev/pci/hifn7751var.h WRITE_REG_1(sc, HIFN_1_7811_MIPSRST, \ WRITE_REG_1 180 dev/pci/hifn7751var.h WRITE_REG_1(sc, HIFN_1_7811_MIPSRST, \