SIS_RXFILT_CTL    352 dev/pci/if_sis.c 	SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ENABLE);
SIS_RXFILT_CTL    354 dev/pci/if_sis.c 	CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
SIS_RXFILT_CTL    356 dev/pci/if_sis.c 	CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR1);
SIS_RXFILT_CTL    358 dev/pci/if_sis.c 	CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
SIS_RXFILT_CTL    361 dev/pci/if_sis.c 	SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ENABLE);
SIS_RXFILT_CTL    728 dev/pci/if_sis.c 		SIS_CLRBIT(sc, SIS_RXFILT_CTL, NS_RXFILTCTL_MCHASH);
SIS_RXFILT_CTL    729 dev/pci/if_sis.c 		SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ALLMULTI);
SIS_RXFILT_CTL    746 dev/pci/if_sis.c 	SIS_SETBIT(sc, SIS_RXFILT_CTL, NS_RXFILTCTL_MCHASH);
SIS_RXFILT_CTL    747 dev/pci/if_sis.c 	SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ALLMULTI);
SIS_RXFILT_CTL    749 dev/pci/if_sis.c 	filtsave = CSR_READ_4(sc, SIS_RXFILT_CTL);
SIS_RXFILT_CTL    753 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_FMEM_LO + (i*2));
SIS_RXFILT_CTL    762 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_FMEM_LO + index);
SIS_RXFILT_CTL    769 dev/pci/if_sis.c 	CSR_WRITE_4(sc, SIS_RXFILT_CTL, filtsave);
SIS_RXFILT_CTL    791 dev/pci/if_sis.c 	ctl = CSR_READ_4(sc, SIS_RXFILT_CTL) & SIS_RXFILTCTL_ENABLE;
SIS_RXFILT_CTL    827 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, (4 + i) << 16);
SIS_RXFILT_CTL    831 dev/pci/if_sis.c 	CSR_WRITE_4(sc, SIS_RXFILT_CTL, ctl);
SIS_RXFILT_CTL    841 dev/pci/if_sis.c 		SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ALLPHYS);
SIS_RXFILT_CTL    843 dev/pci/if_sis.c 		SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ALLPHYS);
SIS_RXFILT_CTL   1676 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR0);
SIS_RXFILT_CTL   1679 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR1);
SIS_RXFILT_CTL   1682 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR2);
SIS_RXFILT_CTL   1686 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
SIS_RXFILT_CTL   1689 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR1);
SIS_RXFILT_CTL   1692 dev/pci/if_sis.c 		CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
SIS_RXFILT_CTL   1734 dev/pci/if_sis.c 		SIS_SETBIT(sc, SIS_RXFILT_CTL, NS_RXFILTCTL_ARP);
SIS_RXFILT_CTL   1735 dev/pci/if_sis.c 		SIS_SETBIT(sc, SIS_RXFILT_CTL, NS_RXFILTCTL_PERFECT);
SIS_RXFILT_CTL   1742 dev/pci/if_sis.c 		SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_BROAD);
SIS_RXFILT_CTL   1744 dev/pci/if_sis.c 		SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_BROAD);
SIS_RXFILT_CTL   1755 dev/pci/if_sis.c 	SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ENABLE);