READ_REG_1        348 dev/pci/hifn7751.c 		    READ_REG_1(sc, HIFN_1_PUB_RESET) | HIFN_PUBRST_RESET);
READ_REG_1        352 dev/pci/hifn7751.c 			if ((READ_REG_1(sc, HIFN_1_PUB_RESET) &
READ_REG_1        367 dev/pci/hifn7751.c 			r = READ_REG_1(sc, HIFN_1_7811_RNGENA);
READ_REG_1        378 dev/pci/hifn7751.c 			    READ_REG_1(sc, HIFN_1_RNG_CONFIG) |
READ_REG_1        409 dev/pci/hifn7751.c 			sts = READ_REG_1(sc, HIFN_1_7811_RNGSTS);
READ_REG_1        422 dev/pci/hifn7751.c 			num1 = READ_REG_1(sc, HIFN_1_7811_RNGDAT);
READ_REG_1        423 dev/pci/hifn7751.c 			num2 = READ_REG_1(sc, HIFN_1_7811_RNGDAT);
READ_REG_1        432 dev/pci/hifn7751.c 		num1 = READ_REG_1(sc, HIFN_1_RNG_DATA);
READ_REG_1        522 dev/pci/hifn7751.c 			if (READ_REG_1(sc, HIFN_1_7811_MIPSRST) &
READ_REG_1        629 dev/pci/hifn7751.c 	dmacfg = READ_REG_1(sc, HIFN_1_DMA_CNFG);
READ_REG_1        660 dev/pci/hifn7751.c 	addr = READ_REG_1(sc, HIFN_1_UNLOCK_SECRET1);
READ_REG_1       1494 dev/pci/hifn7751.c 	    READ_REG_1(sc, HIFN_1_DMA_CSR), READ_REG_1(sc, HIFN_1_DMA_IER),
READ_REG_1       1612 dev/pci/hifn7751.c 	    READ_REG_1(sc, HIFN_1_DMA_CSR), READ_REG_1(sc, HIFN_1_DMA_IER));
READ_REG_1       1683 dev/pci/hifn7751.c 	dmacsr = READ_REG_1(sc, HIFN_1_DMA_CSR);
READ_REG_1       1688 dev/pci/hifn7751.c 	    dmacsr, READ_REG_1(sc, HIFN_1_DMA_IER),
READ_REG_1       1704 dev/pci/hifn7751.c 		    READ_REG_1(sc, HIFN_1_PUB_STATUS) | HIFN_PUBSTS_DONE);
READ_REG_1        177 dev/pci/hifn7751var.h 		    READ_REG_1(sc, HIFN_1_7811_MIPSRST) | (v))
READ_REG_1        181 dev/pci/hifn7751var.h 		    READ_REG_1(sc, HIFN_1_7811_MIPSRST) & ~(v))