RAL_WRITE 750 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR14, 0); RAL_WRITE 921 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); RAL_WRITE 1274 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); RAL_WRITE 1333 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); RAL_WRITE 1336 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR7, r); RAL_WRITE 1364 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); RAL_WRITE 1688 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); RAL_WRITE 1914 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); RAL_WRITE 2099 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BBPCSR, tmp); RAL_WRITE 2111 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BBPCSR, val); RAL_WRITE 2142 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RFCSR, tmp); RAL_WRITE 2273 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR14, 0); RAL_WRITE 2276 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR12, tmp); RAL_WRITE 2278 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR13, 0); RAL_WRITE 2283 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BCNOCSR, tmp); RAL_WRITE 2292 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR14, tmp); RAL_WRITE 2303 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); RAL_WRITE 2307 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); RAL_WRITE 2308 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); RAL_WRITE 2309 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); RAL_WRITE 2312 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); RAL_WRITE 2313 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); RAL_WRITE 2314 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); RAL_WRITE 2359 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR11, tmp); RAL_WRITE 2362 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR18, tmp); RAL_WRITE 2365 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR19, tmp); RAL_WRITE 2378 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); RAL_WRITE 2381 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); RAL_WRITE 2392 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_LEDCSR, tmp); RAL_WRITE 2401 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR5, tmp); RAL_WRITE 2404 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR6, tmp); RAL_WRITE 2415 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR3, tmp); RAL_WRITE 2418 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR4, tmp); RAL_WRITE 2451 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR0, tmp); RAL_WRITE 2481 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BBPCSR1, tmp); RAL_WRITE 2611 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR2, tmp); RAL_WRITE 2612 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); RAL_WRITE 2613 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); RAL_WRITE 2614 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); RAL_WRITE 2615 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); RAL_WRITE 2620 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR1, tmp); RAL_WRITE 2621 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); RAL_WRITE 2625 dev/ic/rt2560.c RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); RAL_WRITE 2631 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); RAL_WRITE 2639 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); RAL_WRITE 2640 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); RAL_WRITE 2660 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR0, tmp); RAL_WRITE 2667 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); RAL_WRITE 2670 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); RAL_WRITE 2697 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); RAL_WRITE 2700 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); RAL_WRITE 2703 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); RAL_WRITE 2704 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR1, 0); RAL_WRITE 2707 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); RAL_WRITE 2710 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); RAL_WRITE 313 dev/ic/rt2560reg.h RAL_WRITE((sc), RT2560_CSR21, (val)); \ RAL_WRITE 786 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); RAL_WRITE 1182 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); RAL_WRITE 1184 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); RAL_WRITE 1185 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); RAL_WRITE 1186 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); RAL_WRITE 1196 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); RAL_WRITE 1212 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); RAL_WRITE 1213 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); RAL_WRITE 1216 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); RAL_WRITE 1217 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); RAL_WRITE 1254 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); RAL_WRITE 1255 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); RAL_WRITE 1536 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); RAL_WRITE 1756 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1); RAL_WRITE 1943 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); RAL_WRITE 1965 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR3, val); RAL_WRITE 1996 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); RAL_WRITE 2010 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, RAL_WRITE 2013 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); RAL_WRITE 2031 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); RAL_WRITE 2037 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); RAL_WRITE 2057 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); RAL_WRITE 2071 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); RAL_WRITE 2082 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR5, 0x3); RAL_WRITE 2085 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR5, 0x150); RAL_WRITE 2088 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR5, 0xf); RAL_WRITE 2136 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); RAL_WRITE 2222 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); RAL_WRITE 2225 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); RAL_WRITE 2234 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); RAL_WRITE 2237 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); RAL_WRITE 2252 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); RAL_WRITE 2285 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); RAL_WRITE 2479 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); RAL_WRITE 2480 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); RAL_WRITE 2481 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); RAL_WRITE 2482 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); RAL_WRITE 2485 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); RAL_WRITE 2488 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); RAL_WRITE 2491 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_RING_CSR0, RAL_WRITE 2497 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_RING_CSR1, RAL_WRITE 2503 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_RX_RING_CSR, RAL_WRITE 2509 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); RAL_WRITE 2512 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); RAL_WRITE 2515 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); RAL_WRITE 2519 dev/ic/rt2661.c RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); RAL_WRITE 2525 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 3); RAL_WRITE 2526 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 0); RAL_WRITE 2564 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); RAL_WRITE 2570 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 4); RAL_WRITE 2573 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); RAL_WRITE 2576 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); RAL_WRITE 2577 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); RAL_WRITE 2580 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); RAL_WRITE 2609 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); RAL_WRITE 2613 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); RAL_WRITE 2616 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 3); RAL_WRITE 2617 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 0); RAL_WRITE 2620 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); RAL_WRITE 2621 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); RAL_WRITE 2624 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); RAL_WRITE 2625 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); RAL_WRITE 2648 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); RAL_WRITE 2651 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); RAL_WRITE 2652 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); RAL_WRITE 2653 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); RAL_WRITE 2656 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); RAL_WRITE 2658 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); RAL_WRITE 2661 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); RAL_WRITE 2750 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); RAL_WRITE 2772 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); RAL_WRITE 2863 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); RAL_WRITE 2877 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); RAL_WRITE 342 dev/ic/rt2661reg.h RAL_WRITE((sc), RT2661_E2PROM_CSR, (val)); \