PLX_CONTROL       455 dev/pci/cz.c   	reg = CZ_PLX_READ(cz, PLX_CONTROL);
PLX_CONTROL       456 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_SWR);
PLX_CONTROL       459 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_CONTROL, reg);
PLX_CONTROL       463 dev/pci/cz.c   	reg = CZ_PLX_READ(cz, PLX_CONTROL);
PLX_CONTROL       464 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_RELOADCFG);
PLX_CONTROL       466 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_CONTROL, reg);
PLX_CONTROL       520 dev/pci/cz.c   	    && ((CZ_PLX_READ(cz, PLX_CONTROL) & CONTROL_FPGA_LOADED) == 0)