LGE_MODE1_SETRST_CTL1  328 dev/pci/if_lge.c 	CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_MCAST);
LGE_MODE1_SETRST_CTL1 1248 dev/pci/if_lge.c 	    LGE_MODE1_SETRST_CTL1|LGE_MODE1_SETRST_CTL2);
LGE_MODE1_SETRST_CTL1 1253 dev/pci/if_lge.c 		    LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_PROMISC);
LGE_MODE1_SETRST_CTL1 1263 dev/pci/if_lge.c 		    LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_BCAST);
LGE_MODE1_SETRST_CTL1 1269 dev/pci/if_lge.c 	CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RMVPAD);
LGE_MODE1_SETRST_CTL1 1275 dev/pci/if_lge.c 	CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_GIANTS);
LGE_MODE1_SETRST_CTL1 1316 dev/pci/if_lge.c 	CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_ENB);
LGE_MODE1_SETRST_CTL1 1319 dev/pci/if_lge.c 	CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_TX_ENB);
LGE_MODE1_SETRST_CTL1 1404 dev/pci/if_lge.c 				    LGE_MODE1_SETRST_CTL1|