HIFN_D_VALID 920 dev/pci/hifn7751.c dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_VALID | HIFN_D_VALID 930 dev/pci/hifn7751.c dma->srcr[HIFN_D_SRC_RSIZE].l = htole32(HIFN_D_VALID | HIFN_D_VALID 940 dev/pci/hifn7751.c dma->dstr[HIFN_D_DST_RSIZE].l = htole32(HIFN_D_VALID | HIFN_D_VALID 950 dev/pci/hifn7751.c dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_VALID | HIFN_D_VALID 964 dev/pci/hifn7751.c const u_int32_t masks = HIFN_D_VALID | HIFN_D_LAST | HIFN_D_MASKDONEIRQ; HIFN_D_VALID 1002 dev/pci/hifn7751.c if ((dma->resr[resi].l & htole32(HIFN_D_VALID)) == 0) HIFN_D_VALID 1029 dev/pci/hifn7751.c const u_int32_t masks = HIFN_D_VALID | HIFN_D_LAST | HIFN_D_MASKDONEIRQ; HIFN_D_VALID 1066 dev/pci/hifn7751.c if ((dma->resr[resi].l & htole32(HIFN_D_VALID)) == 0) HIFN_D_VALID 1283 dev/pci/hifn7751.c dma->dstr[idx].l = htole32(HIFN_D_VALID | HIFN_D_VALID 1290 dev/pci/hifn7751.c dma->dstr[idx].l = htole32(HIFN_D_VALID | HIFN_D_VALID 1300 dev/pci/hifn7751.c l = HIFN_D_VALID | HIFN_D_MASKDONEIRQ | HIFN_D_LAST | HIFN_D_VALID 1305 dev/pci/hifn7751.c l = HIFN_D_VALID | HIFN_D_MASKDONEIRQ | HIFN_D_LAST | HIFN_D_VALID 1310 dev/pci/hifn7751.c dma->dstr[idx].l = htole32(HIFN_D_VALID | HIFN_D_VALID 1318 dev/pci/hifn7751.c dma->dstr[idx].l = htole32(HIFN_D_VALID | HIFN_D_VALID 1332 dev/pci/hifn7751.c dma->dstr[idx].l = htole32(HIFN_D_VALID | HIFN_D_JUMP | HIFN_D_VALID 1359 dev/pci/hifn7751.c HIFN_D_VALID | HIFN_D_MASKDONEIRQ | last); HIFN_D_VALID 1364 dev/pci/hifn7751.c dma->srcr[idx].l = htole32(HIFN_D_VALID | HIFN_D_VALID 1531 dev/pci/hifn7751.c dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_VALID | HIFN_D_VALID 1541 dev/pci/hifn7751.c dma->cmdr[cmdi].l = htole32(cmdlen | HIFN_D_VALID | HIFN_D_LAST | HIFN_D_VALID 1580 dev/pci/hifn7751.c dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_VALID | HIFN_D_VALID 1589 dev/pci/hifn7751.c HIFN_D_VALID | HIFN_D_LAST); HIFN_D_VALID 1741 dev/pci/hifn7751.c if (dma->resr[i].l & htole32(HIFN_D_VALID)) { HIFN_D_VALID 1768 dev/pci/hifn7751.c if (dma->srcr[i].l & htole32(HIFN_D_VALID)) { HIFN_D_VALID 1784 dev/pci/hifn7751.c if (dma->cmdr[i].l & htole32(HIFN_D_VALID)) { HIFN_D_VALID 2197 dev/pci/hifn7751.c if ((dma->resr[i].l & htole32(HIFN_D_VALID)) == 0) { HIFN_D_VALID 2305 dev/pci/hifn7751.c if (dma->dstr[i].l & htole32(HIFN_D_VALID)) { HIFN_D_VALID 2533 dev/pci/hifn7751.c dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_VALID | HIFN_D_VALID 2543 dev/pci/hifn7751.c dma->cmdr[cmdi].l = htole32(cmdlen | HIFN_D_VALID | HIFN_D_LAST | HIFN_D_VALID 2579 dev/pci/hifn7751.c dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_VALID | HIFN_D_VALID 2588 dev/pci/hifn7751.c HIFN_D_VALID | HIFN_D_LAST); HIFN_D_VALID 2639 dev/pci/hifn7751.c if (dma->dstr[i].l & htole32(HIFN_D_VALID)) {