CZ_PLX_WRITE      252 dev/pci/cz.c   	CZ_PLX_WRITE((cz), PLX_LAS0BA, LOCAL_ADDR0_RAM);		\
CZ_PLX_WRITE      258 dev/pci/cz.c   	CZ_PLX_WRITE((cz), PLX_LAS0BA, LOCAL_ADDR0_FPGA);		\
CZ_PLX_WRITE      456 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_SWR);
CZ_PLX_WRITE      459 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_CONTROL, reg);
CZ_PLX_WRITE      464 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_RELOADCFG);
CZ_PLX_WRITE      466 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_CONTROL, reg);
CZ_PLX_WRITE      700 dev/pci/cz.c   		CZ_PLX_WRITE(cz, PLX_LOCAL_PCI_DOORBELL, command);
CZ_PLX_WRITE      933 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTL);
CZ_PLX_WRITE     1223 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL,
CZ_PLX_WRITE     1249 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM);
CZ_PLX_WRITE     1289 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM);
CZ_PLX_WRITE     1450 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLW);
CZ_PLX_WRITE     1455 dev/pci/cz.c   	CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM);