PC/AT互換機のIO Base Address。
最近のマザーボードでは、 Floppy Disk Controller, Serial Port Controller, Keyboard Controller, Parallel Port Controller等のレガシー インターフェースは、Super I/O Chipとして1chipに実装されている。
| 000 | Channel 0 Current Address Register | byte | R |
|---|---|---|---|
| Channel 0 Base/Current Address Register | byte | W | |
| 001 | Channel 0 Current Word Count Register | byte | R |
| Channel 0 Base/Current Word Count Register | byte | W | |
| 002 | Channel 1 Current Address Register | byte | R |
| Channel 1 Base/Current Address Register | byte | W | |
| 003 | Channel 1 Current Word Count Register | byte | R |
| Channel 1 Base/Current Word Count Register | byte | W | |
| 004 | Channel 2 Current Address Register | byte | R |
| Channel 2 Base/Current Address Register | byte | W | |
| 005 | Channel 2 Current Word Count Register | byte | R |
| Channel 2 Base/Current Word Count Register | byte | W | |
| 006 | Channel 3 Current Address Register | byte | R |
| Channel 3 Base/Current Address Register | byte | W | |
| 007 | Channel 3 Current Word Count Register | byte | R |
| Channel 3 Base/Current Word Count Register | byte | W | |
| 008 | Status Register | byte | R |
| Command Register | byte | W | |
| 009 | Request register | byte | W |
| 00A | Mask register | byte | W |
| 00B | Mode register | byte | W |
| 00C | Clear MSB/LSB flip flop | byte | W |
| 00D | Temporary Register | byte | R |
| Master Clear (DMAC reset) | byte | W | |
| 00E | Clear mask register | byte | W |
| 00F | Multiple mask register | byte | W |
010-01F
Reserved
| 020 | Interrupt Request Register(IRR)/In-Service Register(ISR) | byte | R |
|---|---|---|---|
| Operation Command Word2/3(OCW2/3) Initialization Command Word1(ICW1) |
byte | W | |
| 021 | Interrupt Mask Register(IMR) | byte | R |
| OCW1/ICW2/ICW3/ICW4 | byte | W | |
| 022-02F | Reserved | ---- | - |
030-03F
Reserved
| 040 | 8253 channel 0, counter divisor | byte | R/W |
|---|---|---|---|
| 041 | 8253 channel 1, RAM refresh counter | byte | R/W |
| 042 | 8253 channel 2, Cassette and speaker functions | byte | R/W |
| 043 | 8253 Mode Control | byte | W |
| 044 | 8254 PS/2 Extended Timer | byte | ? |
| 045 | Reserved | ---- | - |
| 046 | Reserved | ---- | - |
| 047 | 8254 Channel 3 control byte | byte | - |
| 048 | EISA only | byte | - |
| 049-05F | Reserved | ---- | - |
| 060 | Keyboard Input Buffer Register | byte | R |
|---|---|---|---|
| Keyboard Output Buffer Register | byte | W |
| 061 |
Port B System Status
bit 0 ? bit 1 ? bit 2 ? bit 3 ? bit 4 ? bit 5 ? bit 6 ? bit 7 ? |
byte | R |
|---|---|---|---|
Port B System Command
bit 0 1:Timer 2 gate to speaker enabl bit 1 1:Speaker data enable bit 2 ? bit 3 ? bit 4 unused bit 5 unused bit 6 unused bit 7 unused |
byte | W |
062-06F
Keyboard Controller (KBC)
| 062 | Reserved | ---- | - |
|---|---|---|---|
| 063 | Reserved | ---- | - |
| 064 | Status Register | byte | R |
| Command Register | byte | W | |
| 065-06F | Reserved | ---- | - |
070-07F
Real Time Clock, NMI mask
| 070 | RTC,NMI enable/disable | byte | R |
|---|---|---|---|
| 071 | RTC data | byte | R/W |
| 072-07F | Reserved | ---- | ---- |
| 080 | Manufacturer systems checkpoint port (used during POST) | byte | W |
|---|---|---|---|
| 081 | DMA Channel 2 Upper Address | byte | W |
| 082 | DMA Channel 3 Upper Address | byte | W |
| 083 | DMA Channel 1 Upper Address | byte | W |
| 084 | Reserved | ---- | ---- |
| 085 | Reserved | ---- | ---- |
| 086 | Reserved | ---- | ---- |
| 087 | DMA Channel 0 Upper Address | byte | W |
| 088 | Reserved | ---- | ---- |
| 089 | DMA Channel 6 Upper Address | byte | W |
| 08A | DMA Channel 7 Upper Address | byte | W |
| 08B | DMA Channel 5 Upper Address | byte | W |
| 08C | Reserved | ---- | ---- |
| 08D | Reserved | ---- | ---- |
| 08F | Upper Address When RAM Reflash | byte | W |
| 0A0 | Interrupt Request Register(IRR)/In-Service Register(ISR) | byte | R |
|---|---|---|---|
| Operation Command Word2/3(OCW2/3) Initialization Command Word1(ICW1) |
byte | W | |
| 0A1 | Interrupt Mask Register(IMR) | byte | R |
| OCW1/ICW2/ICW3/ICW4 | byte | W | |
| 0A2-0AF | Reserved | ---- | - |
0B0-0BF
Reserved
| 0C0 | Channel 0 Current Address Register | byte | R |
|---|---|---|---|
| Channel 0 Base/Current Address Register | byte | W | |
| 0C2 | Channel 0 Current Word Count Register | byte | R |
| Channel 0 Base/Current Word Count Register | byte | W | |
| 0C4 | Channel 1 Current Address Register | byte | R |
| Channel 1 Base/Current Address Register | byte | W | |
| 0C6 | Channel 1 Current Word Count Register | byte | R |
| Channel 1 Base/Current Word Count Register | byte | W | |
| 0C8 | Channel 2 Current Address Register | byte | R |
| Channel 2 Base/Current Address Register | byte | W | |
| 0CA | Channel 2 Current Word Count Register | byte | R |
| Channel 2 Base/Current Word Count Register | byte | W | |
| 0CC | Channel 3 Current Address Register | byte | R |
| Channel 3 Base/Current Address Register | byte | W | |
| 0CE | Channel 3 Current Word Count Register | byte | R |
| Channel 3 Base/Current Word Count Register | byte | W | |
| 0D0 | Status Register | byte | R |
| Command Register | byte | W | |
| 0D2 | Request register | byte | W |
| 0D4 | Mask register | byte | W |
| 0D6 | Mode register | byte | W |
| 0D8 | Clear MSB/LSB flip flop | byte | W |
| 0CA | Temporary Register | byte | R |
| Master Clear (DMAC reset) | byte | W | |
| 0DC | Clear mask register | byte | W |
| 0DE | Multiple mask register | byte | W |
| 0DF | Reserved | ---- | - |
0E0-0EF
Reserved
0F0-0FF
Math coprocessor
| 0F0 | Clear Math coprocessor Busy | byte | W |
|---|---|---|---|
| 0F1 | Reset Math coprocessor Busy | byte | W |
| 0F2-0F7 | Reserved | ---- | - |
| 0F8-0FF | Math coprocessor register | ---- | ---- |
100-16F
Reserved
140-15F
Secondary SCSI host adapter ?
170-17F
Secondary Parallel ATA Disk Controller (ATA2)
| 170 | Data Register | word | R/W |
|---|---|---|---|
| 171 | Error Register | byte | R |
| Features Register | byte | W | |
| 172 | Sector Count Register | byte | R/W |
| 173 | Sector Number Register | byte | R/W |
| 174 | Cylinder Low Register | byte | R/W |
| 175 | Cylinder High Register | byte | R/W |
| 176 | Drive/Head Register | byte | R/W |
| 177 | Status Register | byte | R |
| Command Register | byte | W | |
| 178-17F | Reserved | ---- | - |
180-1EF
Reserved
1F0-1FF
Primary Parallel ATA Disk Controller (ATA1)
| 1F0 | Data Register | word | R/W |
|---|---|---|---|
| 1F1 | Error Register | byte | R |
| Features Register | byte | W | |
| 1F2 | Sector Count Register | byte | R/W |
| 1F3 | Sector Number Register | byte | R/W |
| 1F4 | Cylinder Low Register | byte | R/W |
| 1F5 | Cylinder High Register | byte | R/W |
| 1F6 | Drive/Head Register | byte | R/W |
| 1F7 | Status Register | byte | R |
| Command Register | byte | W | |
| 1F8-1FF | Reserved | ---- | - |
200-20F
Game Adapter
| 201 |
Joysticks
bit 0 joystick a, x coord (0 = timing active) bit 1 joystick a, y coord (0 = timing active) bit 2 joystick b, x coord (0 = timing active) bit 3 joystick b, y coord (0 = timing active) bit 4 joystick a, button 1 (0=pressed) bit 5 joystick a, button 2 (0=pressed) bit 6 joystick b, button 1 (0=pressed) bit 7 joystick b, button 2 (0=pressed) |
byte | R |
|---|---|---|---|
Paddles
bit 0 Paddles a, x coord (0 = timing active) bit 1 Paddles a, y coord (0 = timing active) bit 2 Paddles b, x coord (0 = timing active) bit 3 Paddles b, y coord (0 = timing active) bit 4 Paddles a, button 1 (0=pressed) bit 5 Paddles a, button 2 (0=pressed) bit 6 Paddles b, button 1 (0=pressed) bit 7 Paddles b, button 2 (0=pressed) |
byte | R |
210-277
Reserved
| 278 |
Printer Data Output
bit 0 hardware pin 2 bit 1 hardware pin 3 bit 2 hardware pin 4 bit 3 hardware pin 5 bit 4 hardware pin 6 bit 5 hardware pin 7 bit 6 hardware pin 8 bit 7 hardware pin 9 |
byte | R |
|---|---|---|---|
| 279 |
Printer Status Register
bit 0 1=time-out bit 1 unused bit 2 unused bit 3 1=error, hardware pin 15 bit 4 1=on-line, hardware pin 13 bit 5 1=out of paper, hardware pin 12 bit 6 0=Acknowledge, hardware pin 10 bit 7 0=busy, hardware pin 11 |
byte | R/W |
| 279 |
Printer Control Register
bit 0 1=output data to printer, hardware pin 1 bit 1 1=auto line feed, hardware pin 14 bit 2 0=initialize printer, hardware pin 16 bit 3 1=printer reads output, hardware pin 17 bit 4 0=IRQ disable,1=IRQ enable for ACK bit 5 unused bit 6 unused bit 7 unused |
byte | R/W |
280-2AF
Reserved
2B0-2DF
Alternate EGA, or 3270 PC video ?
2E0
Alternate EGA/VGA ?
2E1
GPIB Adapter ?
2E2-2E3
Data acquisition adapter ?
2E4-2E7
Reserved
| 2E8 | Receiver Buffer Register | byte | R |
|---|---|---|---|
| Transmitter Holding Register | byte | W | |
| 2E9 | Interrupt Enable Register | byte | R/W |
| 2EA | Interrupt Identification Register | byte | R |
| FIFO Control Register | byte | W | |
| 2EB | Line Control Register | byte | R/W |
| 2EC | MODEM Control Register | byte | R/W |
| 2ED | Line Status Register | byte | R |
| 2EE | MODEM Status Register | byte | R |
| 2EF | Scratch Register | byte | R/W |
2F0-2F7
Reserved
| 2F8 | Receiver Buffer Register | byte | R |
|---|---|---|---|
| Transmitter Holding Register | byte | W | |
| 2E9 | Interrupt Enable Register | byte | R/W |
| 2FA | Interrupt Identification Register | byte | R |
| FIFO Control Register | byte | W | |
| 2FB | Line Control Register | byte | R/W |
| 2FC | MODEM Control Register | byte | R/W |
| 2FD | Line Status Register | byte | R |
| 2FE | MODEM Status Register | byte | R |
| 2FF | Scratch Register | byte | R/W |
300-31F
Prototype Experimentation Card ?
320-370
Reserved
| 370 | Reserved | ---- | - |
|---|---|---|---|
| 371 | Reserved | ---- | - |
| 372 | Digital Output Register | byte | W |
| 373 | Reserved | ---- | - |
| 374 | Main Status Register | byte | W |
| 375 | Data Register | byte | R/W |
376
Secondary Parallel ATA Disk Controller (ATA2)
| 376 | Alternate Status Register | byte | R |
|---|---|---|---|
| Device Control Register | byte | W |
377
Floppy Disk Controller #2 (FDC2)
| 370 | Digital Input Register(DIR) | byte | R |
|---|---|---|---|
| Data Rate Select Register(DSR) | byte | R |
| 378 |
Printer Data Output
bit 0 hardware pin 2 bit 1 hardware pin 3 bit 2 hardware pin 4 bit 3 hardware pin 5 bit 4 hardware pin 6 bit 5 hardware pin 7 bit 6 hardware pin 8 bit 7 hardware pin 9 |
byte | R |
|---|---|---|---|
| 379 |
Printer Status Register
bit 0 1=time-out bit 1 unused bit 2 unused bit 3 1=error, hardware pin 15 bit 4 1=on-line, hardware pin 13 bit 5 1=out of paper, hardware pin 12 bit 6 0=Acknowledge, hardware pin 10 bit 7 0=busy, hardware pin 11 |
byte | R/W |
| 379 |
Printer Control Register
bit 0 1=output data to printer, hardware pin 1 bit 1 1=auto line feed, hardware pin 14 bit 2 0=initialize printer, hardware pin 16 bit 3 1=printer reads output, hardware pin 17 bit 4 0=IRQ disable,1=IRQ enable for ACK bit 5 unused bit 6 unused bit 7 unused |
byte | R/W |
380-3AF
Reserved
3B0-3BF
Monochrome Display Adapter
| 3B0 | Port Address Decodes to 3B4 | ---- | ---- |
|---|---|---|---|
| 3B1 | Port Address Decodes to 3B5 | ---- | ---- |
| 3B2 | Port Address Decodes to 3B4 | ---- | ---- |
| 3B3 | Port Address Decodes to 3B5 | ---- | ---- |
| 3B4 | 6845 Index Register | ---- | ---- |
| 3B5 | 6845 Data Register | ---- | ---- |
| 3B6 | Port Address Decodes to 3B4 | ---- | ---- |
| 3B7 | Port Address Decodes to 3B5 | ---- | ---- |
| 3B8 | 6845 Mode Control Register | ---- | ---- |
| 3B9 | Reserved For Color Select Register on Color Adapter | ---- | ---- |
| 3BA | Status Register | ---- | ---- |
| 3BB | Reserved For Light Pen Strobe Reset | ---- | ---- |
| 3BC |
Printer Data Output
bit 0 hardware pin 2 bit 1 hardware pin 3 bit 2 hardware pin 4 bit 3 hardware pin 5 bit 4 hardware pin 6 bit 5 hardware pin 7 bit 6 hardware pin 8 bit 7 hardware pin 9 |
byte | R |
|---|---|---|---|
| 3BD |
Printer Status Register
bit 0 1=time-out bit 1 unused bit 2 unused bit 3 1=error, hardware pin 15 bit 4 1=on-line, hardware pin 13 bit 5 1=out of paper, hardware pin 12 bit 6 0=Acknowledge, hardware pin 10 bit 7 0=busy, hardware pin 11 |
byte | R/W |
| 3BE |
Printer Control Register
bit 0 1=output data to printer, hardware pin 1 bit 1 1=auto line feed, hardware pin 14 bit 2 0=initialize printer, hardware pin 16 bit 3 1=printer reads output, hardware pin 17 bit 4 0=IRQ disable,1=IRQ enable for ACK bit 5 unused bit 6 unused bit 7 unused |
byte | R/W |
3C0-3CF
EGA/VGA
| 3C0 | VGA attribute and sequencer register | ---- | - |
|---|---|---|---|
| 3C1 | Other video attributes | ---- | - |
| 3C2 | EGA, VGA, CGA input status 0 | ---- | - |
| 3C3 | Video subsystem enable | ---- | - |
| 3C4 | CGA, EGA, VGA sequencer index | ---- | - |
| 3C5 | CGA, EGA, VGA sequencer | ---- | - |
| 3C6 | VGA video DAC PEL mask | ---- | - |
| 3C7 | VGA video DAC state | ---- | - |
| 3C8 | VGA video DAC PEL address | ---- | - |
| 3C9 | VGA video DAC | ---- | - |
| 3CA | VGA graphics 2 position | ---- | - |
| 3CC | VGA graphics 1 position | ---- | - |
| 3CD | VGA feature control | ---- | - |
| 3CE | VGA graphics index | ---- | - |
| 3CF | Other VGA graphics | ---- | - |
3D0-3DF
Color Graphics Monitor Adapter
| 3D0 | port address decodes to 3D4 | ---- | - |
|---|---|---|---|
| 3D1 | port address decodes to 3D5 | ---- | - |
| 3D2 | port address decodes to 3D4 | ---- | - |
| 3D3 | port address decodes to 3D5 | ---- | - |
| 3D4 | 6845 index register | ---- | - |
| 3D5 | 6845 data register | ---- | - |
| 3D6 | port address decodes to 3D4 | ---- | - |
| 3D7 | port address decodes to 3D5 | ---- | - |
| 3D8 | 6845 Mode control register | ---- | - |
| 3D9 | color select palette register | ---- | - |
| 3DA | status register | ---- | - |
| 3DB | Clear light pen latch | ---- | - |
| 3DC | Preset Light pen latch | ---- | - |
| 3DF | Reserved ? | ---- | - |
| 3E8 | Receiver Buffer Register | byte | R |
|---|---|---|---|
| Transmitter Holding Register | byte | W | |
| 3E9 | Interrupt Enable Register | byte | R/W |
| 3EA | Interrupt Identification Register | byte | R |
| FIFO Control Register | byte | W | |
| 3EB | Line Control Register | byte | R/W |
| 3EC | MODEM Control Register | byte | R/W |
| 3ED | Line Status Register | byte | R |
| 3EE | MODEM Status Register | byte | R |
| 3EF | Scratch Register | byte | R/W |
| 3F0 | Reserved | ---- | - |
|---|---|---|---|
| 3F1 | Reserved | ---- | - |
| 3F2 | Digital Output Register | byte | W |
| 3F3 | Reserved | ---- | - |
| 3F4 | Main Status Register | byte | W |
| 3F5 | Data Register | byte | R/W |
3F6
Primary Parallel ATA Disk Controller (ATA1)
| 3F6 | Alternate Status Register | byte | R |
|---|---|---|---|
| Device Control Register | byte | W |
3F7
Floppy Disk Controller #1 (FDC1)
| 3F7 | Digital Input Register(DIR) | byte | R |
|---|---|---|---|
| Data Rate Select Register(DSR) | byte | R |
| 3F8 | Receiver Buffer Register | byte | R |
|---|---|---|---|
| Transmitter Holding Register | byte | W | |
| 3F9 | Interrupt Enable Register | byte | R/W |
| 3FA | Interrupt Identification Register | byte | R |
| FIFO Control Register | byte | W | |
| 3FB | Line Control Register | byte | R/W |
| 3FC | MODEM Control Register | byte | R/W |
| 3FD | Line Status Register | byte | R |
| 3FE | MODEM Status Register | byte | R |
| 3FF | Scratch Register | byte | R/W |
400-CF7
Reserved
